pouët.net

[ Atariscne.org - News ] Forever 2026 live stream

The live stream of this weekend's FOReVER  party in Suchá nad Parnou, Slovakia can be found here. As it might be of relevance to understand what you see, this year's topic is "8bit winter games".

[ Atariscne.org - News ] Cannon Fooder Atari STE version

Apparently, the Polish developer kTz from Retro Blitter Team known from his latest game Rogul is working on a STE enhanced version of Cannon Fodder, to finally catch up with the Am***.

Atarimania also lists a WIP version already.

Once more, Revision is going to be packed with lots of competitions, live acts and seminars - but first we go with the compo plan. Keep an eye out for another update on the concerts, shows and seminars!

https://2026.revision-party.net/events/timetable/

As you can see, we decided to run the last compo block slightly earlier to hopefully still have everyone getting a good (enough) night's rest.

Thank you for all your input and the (mostly) constructive discussions last year. We really appreciate it and hope we'll manage to do justice by the party animals as much as the connoisseurs that like to watch their compos with a keen mind.

We can't wait to see you soon!

[Submitted by Shana]

[ Atariscne.org - News ] gwEm/PHF releases STe sample demo framework

gwEm writes:

In order to encourage people to enter the Buxton Bytes sample demo showcase I am releasing the full source code to my entry way in advance of the event.

https://github.com/gwEm303/sample_demo

[ Atariscne.org - News ] GCC optimizations and 68000 cycle counter

PeyloW of T.O.Y.S. have been busy lately by optimizing the GNU C Compiler (GCC) v15.2 to create faster code for 68000 processor.

The improvements include using proper dbra/dbf loops, auto inc/dec of address registers (you know, the stuff that is nice on 68k!).

PeyloW writes in an Atari-Forum post:

At a very high level there are 7 groups of changes made:

• Cost Model - More accurate cost models, allowing gcc to chose better.
• Register Allocation – Adopt LRA, and tune to prefer fewer registers.
• Loop Optimization – Adopt new doloop hooks to enable more explicit use of dbra.
• Memory Access Reordering – More of cleanup pass for other optimisations, try to ensure memory access is sequential.
• Autoincrement Optimization – Which allows more auto increment to be used instead of indexed addressing.
• 16/32-bit Optimization – And merging of 2x word accesses into single long access. Also narrow mulu/muls operators to word size if operand sizes can be determined at compile time.
• Various Smaller Optimizations – Grab bag of stuff. Single bit extraction bit btst/tas, and simple peephole optimizations.

While working on GCC, PeyloW also developed a separate tool to count 68000 cycles out of assembler sourcecode to easily check if the compiler changes actually improve stuff - but can certainly can be very useful for other purposes as well.

Both projects can be found on Github, see links below.

🔗 m68k GCC Build Scripts and Documentation

🔗 A detailed writeup of PeyloWs GCC optimizations

🔗 clccnt — MC68k Clock Cycle Counter