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Is it possible to arrange multiple sprites so that one "scanline" (that is made of multiple sprites) is laid out continuously as memory? Only single bitplane is enough. There can be extra space between individual scanlines.

Copper/CPU is not available to update manual mode with new data every scanline.

This is fully expected to go residue soon, but that's okay!

If copper and CPU are not available, then only DMA is available, and since there are no DMA modulo registers (or tricks) known to me, I'd say no: Sprites are 1-word-wide, two consecutive interleaved bitplanes each, then. No idea about AGA, though.

Aga sprites can easily cover the screen.

Yeah this question was about OCS, and that's what I thought too. I was initially thinking if they could be interleaved and palette used to make the next sprites' bits not matter, but can't do that without programmable modulo.

And oh man those AGA "enhancements". Wider sprites? In 1992? sigh.

Agnus sprite DMA has two slots per sprite per scanline and either writes SPRxPOS/CTL (in a scanline before the specified VPOS, this write disables a sprite's drawing in the Denise) or SPRxDATA/B (if the VPOS matches, this enables a sprite's drawing in the Denise). After the last VPOS match the Agnus reads the next SPRxPOS/CTL (that's why you need a zero after the sprite data if the sprite is not reused vertically, and the reason for the 1 scanline gap before a sprite can be reused vertically).
Reusing sprites horizontally would require manually writing SPRxPOS/CTL and SPRxDATA/B. For a full 320 pixel scanline you would have to reuse nearly every sprite three times. This is not possible without the Copper and the CPU (the latter is tricky anyway, since you would have to sync the CPU with the scanline slots).

128 wide scanlines would be okay for this case, I was maybe a bit unclear, but I meant that is there a trick (without active micro-management by copper or cpu) to have these individual lines 128 of pixels be laid continuously in memory.

like:
[8 words of pixels] [gap N words (pun not intended)]
[8 words of pixels] [gap]
[8 words of pixels] [gap]
[8 words of pixels] [gap]
etc.

But I guess it's impossible..

Thanks for the description though, I hadn't 100% connected that the sprite's first DMA fetch of course writes the SPRxPOS/CTL, even though it's really obvious now :)

I see. Well, since the Agnus has a separate state machine with linear fetches per sprite, the answer should still be: nope :)